veyepar: FireSim: A Scalable Platform for FPGA-Accelerated Simulation, Debugging, Profiling of RTL Designs

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Name: FireSim: A Scalable Platform for FPGA-Accelerated Simulation, Debugging, Profiling of RTL Designs
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Author(s):	Sagar Karandikar
Location	UCSB Henley Hall room 1010
Date	mar Fri 31	Days Raw Files
Start	13:30	First Raw Start	13:02
Duration	00:20:00	Offset	0:27:59
End	13:50	Last Raw End	14:04
Chapters	00:00 0:15:38 0:24:10
Total cuts_time	27 min.

https://www.fossi-foundation.org/latchup/#presentations
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assets release.pdf FireSim_A_Scalable_Platform_for_FPGAAccelerated_Simulation_Debugging_and_Profiling_of_RTL_Designs.json
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Description:	FireSim is an easy-to-use, open-source, FPGA-accelerated hardware simulation platform that runs on cloud and on-premises FPGAs, including AWS EC2 F1 and local machines with Xilinx Alveo boards. FireSim automatically instruments and transforms RTL designs into fast (10s-100s MHz), deterministic, and cycle-exact FPGA-based simulators that enable productive pre-silicon verification and performance validation. Users can plug in their own designs or harness the included Chipyard SoC design environment, which includes in-order and out-of-order RISC-V cores, uncore components, peripherals, and accelerators. In contrast with traditional FPGA prototyping, FireSim includes synthesizable and timing-accurate models for standard I/O interfaces like DRAM, Ethernet, UART, and others, allowing users to obtain accurate performance measurements for their pre-silicon design. FireSim also provides a large array of debugging and profiling features not available in FPGA prototypes, including assertion synthesis, print synthesis, out-of-band instruction trace and performance counter recording, Flame Graph integration, and co-simulation with software models. These features enable rapidly debugging and profiling designs trillions of cycles into simulation, without perturbing design behavior. By providing a framework to automate the management of FPGA infrastructure, FireSim lets hardware and software developers get a head-start on building software for novel hardware designs, by letting developers interact with the pre-silicon hardware design as they would a virtual machine. In effect, both hardware and software developers can work from a single source of truth: the RTL for the hardware design. FireSim also scales to simulating thousands of multi-core compute nodes, including the ability to simulate large clusters of networked designs over hundreds of FPGAs. By providing a consistent, user-friendly interface for managing simulations, FireSim enables easy scaling from small numbers of simulations hosted by on-premises FPGAs to massive simulations using hundreds of FPGAs on the cloud. This allows FireSim to remove the high capex traditionally involved in large-scale FPGA-based simulation, democratizing access to realistic pre-silicon hardware modeling of new designs. By defining standardized host platforms and providing a large amount of automation/tooling, FireSim drastically simplifies the process of building and deploying large-scale FPGA-based hardware simulations. To date, FireSim has been used in the development of commercial silicon and in published work from authors at over 20 academic and industrial institutions across various areas including computer architecture, systems, networking, circuits, security, and HPC. markdown
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