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Finite state machines: a design pattern for FPGAs and React
--client
lca
--show
lca2019
--room c3 14490 --force
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Marks
Author(s):
Tessa Bradbury
Location
C3
Date
jan Thu 24
Days Raw Files
Start
11:35
First Raw Start
11:08
Duration
0:45:0
Offset
0:26:08
End
12:20
Last Raw End
12:29
Chapters
00:00
0:03:54
0:29:30
Total cuts_time
29 min.
https://2019.linux.conf.au/schedule/presentation/261/
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At my current job we use React as our frontend javascript framework. After just joining the company, I was reading through the documentation when it suddenly hit me that it was describing was a finite state machine. I knew about finite state machines! I did those back at university! And that was when I realised the most useful unit I did at university for working with React was the FPGA and microprocessor course. This talk will cover what finite state machines are, how they are useful across the width and breadth of software development, including both IoT and javascript, and some key things to remember when implementing them.
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