veyepar: Giving Students A Byte of Open-Source: Advancing Hardware Education

Author(s):	Ethan Sifferman
Location	b45r230
Date	apr Fri 19	Days Raw Files
Start	15:00	First Raw Start	14:54
Duration	00:20:00	Offset	0:05:38
End	15:20	Last Raw End	15:34
Chapters	00:00 0:13:33 0:15:35
Total cuts_time	18 min.

https://fossi-foundation.org/latch-up/2024
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Description:	In the rapidly expanding semiconductor industry, there is an increasing demand for skilled chip developers. Yet, the steep learning curve associated with Hardware Description Languages often acts as a significant barrier for students hoping to pursue a career in digital design. As a UC Santa Cruz Lecturer, I will demonstrate how SystemVerilog has become more accessible through open-source resources such as FuseSoC, Verilator, Yosys, DigitalJS, CVA6, Ibex, Sky130, and more. Key points include the superior pedagogical features of open-source tools compared to commercial alternatives, the availability of open-source designs as references for writing scalable RTL, and the effectiveness of open-source PDKs and netlist viewers for deeper synthesis comprehension. Throughout the presentation, I will present applied case studies originating from esteemed institutions like UC Santa Barbara and UC Santa Cruz, alongside supplementary content available on my educational YouTube channel. markdown
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