veyepar: Artifact Evaluation for the Field Programmable Gate Array Community

Author(s):	Miriam Leeser
Location	b45r230
Date	apr Fri 19	Days Raw Files
Start	12:40	First Raw Start	11:54
Duration	00:20:00	Offset	0:45:38
End	13:00	Last Raw End	13:24
Chapters	00:00 0:08:54 0:13:54
Total cuts_time	18 min.

https://fossi-foundation.org/latch-up/2024
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assets release.pdf Artifact_Evaluation_for_the_Field_Programmable_Gate_Array_Community.json
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Description:	Field Programmable Gate Arrays (FPGAs) are on the border between hardware and software. The software community has adopted Artifact Evaluation (AE) for publications, where authors can have their code and data evaluated by a third party and receive badges based on the evaluator's results. I introduced AE to the FPGA commmunity five years ago, and it has been adopted by the major FPGA conferences and publications. I will discuss badges available for artifacts (for hardware and software as well as data) from ACM and IEEE. I will highlight the benefits as well as the unique challenges in evaluating artifacts for FPGAs. AE promotes reproducible results in our community. markdown
Comment:	production notes

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