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Quality of Life with Virtual Prototypes - Open Source Tools in the Ecosystem of the RISC-V VP
--client
fossi
--show
latch_2023
--room henley1010 15248 --force
Next: 10 Constellation: A Open-Source Chisel Generator for Network-on-Chip Interconnects
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Marks
Author(s):
Pascal Pieper
Location
UCSB Henley Hall room 1010
Date
apr Sat 01
Days Raw Files
Start
16:00
First Raw Start
15:27
Duration
00:20:00
Offset
0:32:01
End
16:20
Last Raw End
16:32
Chapters
00:00
0:20:15
Total cuts_time
26 min.
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This presentation will talk about the open source ecosystem around the RISC-V Virtual Prototype (VP) and how to apply virtual prototyping techniques to boost the design process. Besides architecture level modeling tools like the VP itself, there will be introductions into an off-chip environment GUI, a Hardware-in-the-Loop system for physical peripherals, as well as several software and (virtual) hardware verification tools. The focus of the talk will be on understanding the principles and decreasing the distance of the average designer to these academic sounding tools; to improve both the flexibility in design space exploration and the quality of the end product.
Comment:
production notes
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