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Open-source resources for learning the Bluespec HL-HDLs
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fossi
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latch_2024
--room b45r230 15368 --force
Next: 10 PyHDL-IF: An Easy-to-Use Python/HDL Cross-Calling Interface
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Marks
Author(s):
Rishiyur Nikhil
Location
b45r230
Date
apr Fri 19
Days Raw Files
Start
15:40
First Raw Start
14:54
Duration
00:20:00
Offset
0:45:38
End
16:00
Last Raw End
16:24
Chapters
00:00
-1:47:51
Total cuts_time
2 min.
https://fossi-foundation.org/latch-up/2024
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We will provide an overview of free and open-source course-material (textbook, slides, working code, etc) that we have recently developed for simultaneously learning the Bluespec HL-HDLs (High-Level Hardware Design Languages), basic principles of RISC-V, and simple pipelined CPUs.
Comment:
production notes
2024-04-19/14_54_22.ts
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14:54:22
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2024-04-19/15_54_22.ts
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