Fossi Foundation
Latch-Up 2023
1. FireSim: A Scalable Platform for FPGA-Accelerated Simulation, Debugging, Profiling of RTL Designs (Sagar Karandikar) http://youtu.be/_leRHbe5t6M 27 min.
2. bsg_tag: A minimal open-source ASIC configuration bus (Dan Petrisko) https://youtu.be/r62g-wwBLkI 19 min.
3. OmniXtend: coherent scaleout over commodity fabrics (Dejan Vucinic) http://youtu.be/77NgrqPQjec 24 min.
4. Hammer: A Modular and Reusable Physical Design Flow Tool (Nayiri Krzysztofowicz) http://youtu.be/-wx_SNdCb7I 27 min.
5. CIRCT: Open Source Circuit IR Compilers and Tools (Mike Urbach) https://youtu.be/w_W0_Z3n9PA 33 min.
6. Accelerating Chisel Development (Jack Koenig) https://youtu.be/u3ZhH5g6FW0 35 min.
7. Open-Source HW Commercial Adoption (Rick O'Connor) https://youtu.be/_OA6PVZ-MCw 56 min.
8. A UCSC Professor's path through Open-Source Hardware (Jose Renau) http://youtu.be/gNJVZrEdfMA 12 min.
9. So You Want to be an Open Sourcerer? (Dustin Richmond) None 19 min.
10. If You Build It, Who Will Come? (Scott Beamer) http://youtu.be/mlBZMiu95PM 23 min.
11. Yet Another UCSC Professor’s path through Open-Source Hardware (Matt Guthaus) http://youtu.be/2K1cxnPrSug 23 min.
12. Tapeout-in-a-Semester: The Organization of Berkeley's Tapeout Course (Jerry Zhao) http://youtu.be/slIVkBrkgaM 27 min.
13. Fearless Hardware Design (Rachit Nigam) https://youtu.be/sfNxTACbUTE 24 min.
14. Minimax - a Compressed-First, Microcoded RISC-V CPU (Graeme Smecher) http://youtu.be/lWaHuwaeTAw 32 min.
15. Open Source Brain-Inspired Neuromorphic Software and Hardware (Jason Eshraghian) http://youtu.be/uhtTlpfFVXE 30 min.
16. Gdsfactory, an Open Source python flow for circuit design, verification and validation (Joaquin Matres) http://youtu.be/ZXjVonB4dNI 3 min.
17. RISu064 - An in-order non-blocking dual-issue RISC-V 64 processor (Wenting Zhang) http://youtu.be/h31QWcm_Wlk 2 min.
18. SimCommand: A High-Performance RTL Testbench API with Fork/Join Support (Vighnesh Iyer) http://youtu.be/dsALz1U8TUE 3 min.
19. A radically simple 1-bit single-die "supercomputer" (James Bowman) http://youtu.be/IKrc1mSMYe0 3 min.
20. All Your OSS Codebase Are Belong To Us (Oron Port) http://youtu.be/Q5ruddIVKIQ 2 min.
21. A Modular Approach to Variable Pipeline Depth Designs (Peter Herrmann) http://youtu.be/xDtJdZaPN0g 3 min.
22. Open-source Hardware for Real-Time Applications (Francisco Wilken) http://youtu.be/kM-jcQyby30 3 min.
23. An open-source robotics applications interface (Nikita Klimov) http://youtu.be/Af8vDKuaN2I 3 min.
24. DSAGEN: Democratizing Domain-Specific Accelerator Generation for FPGA Overlays (Dylan Kupsh) http://youtu.be/xytoGUs7I9o 2 min.
25. Educational Framework for Functional Verification (Matthew Michilot) http://youtu.be/IzvnDRHuc4U 3 min.
26. Using CVA6 in Architecture Education (Ethan Sifferman) http://youtu.be/6cvJfdh5msQ 3 min.
27. Open tools for an open standard: Control/status register automation using SystemRDL (Alex Mykyta) None 25 min.
28. Goodbye Make, Hello SiliconCompiler! (Andreas Olofsson) http://youtu.be/GM9PKAfTlmQ 35 min.
29. Chipyard: An Open-Source RISC-V SoC Design Framework (Abraham Gonzalez) http://youtu.be/pYyv8BJ5n68 31 min.
30. SVA based Checker IP in Verilator (Balram, Srinivasan Venkataramanan) https://youtu.be/abTsJTOIQkM 18 min.
31. Quality of Life with Virtual Prototypes - Open Source Tools in the Ecosystem of the RISC-V VP (Pascal Pieper) http://youtu.be/hUduTEOywLs 26 min.
32. Constellation: A Open-Source Chisel Generator for Network-on-Chip Interconnects (Jerry Zhao) https://youtu.be/n3xG3EJpofc 35 min.
33. SystemVerilog-Style Constraints and Functional Coverage in Python (Matthew Ballance) https://youtu.be/J4bYP3mTpeA 34 min.
34. OpenROAD - Turning Designs into Optimized Silicon (Matt Liberty) http://youtu.be/DuqdMc4Kc3k 55 min.
35. Space - Opportunities, Challenges for Open Source Community (CHINH LE) https://youtu.be/nUCjrDn5Xnk 30 min.
36. Online Waveform viewer. Why do we need one? (Aliaksei Chapyzhenka) https://youtu.be/CyCBZFjw-PQ 30 min.
1. http://youtu.be/_leRHbe5t6M 27 min.
2. https://youtu.be/r62g-wwBLkI 19 min.
3. http://youtu.be/77NgrqPQjec 24 min.
4. http://youtu.be/-wx_SNdCb7I 27 min.
5. https://youtu.be/w_W0_Z3n9PA 33 min.
6. https://youtu.be/u3ZhH5g6FW0 35 min.
7. https://youtu.be/_OA6PVZ-MCw 56 min.
8. http://youtu.be/gNJVZrEdfMA 12 min.
9. None 19 min.
10. http://youtu.be/mlBZMiu95PM 23 min.
11. http://youtu.be/2K1cxnPrSug 23 min.
12. http://youtu.be/slIVkBrkgaM 27 min.
13. https://youtu.be/sfNxTACbUTE 24 min.
14. http://youtu.be/lWaHuwaeTAw 32 min.
15. http://youtu.be/uhtTlpfFVXE 30 min.
16. http://youtu.be/ZXjVonB4dNI 3 min.
17. http://youtu.be/h31QWcm_Wlk 2 min.
18. http://youtu.be/dsALz1U8TUE 3 min.
19. http://youtu.be/IKrc1mSMYe0 3 min.
20. http://youtu.be/Q5ruddIVKIQ 2 min.
21. http://youtu.be/xDtJdZaPN0g 3 min.
22. http://youtu.be/kM-jcQyby30 3 min.
23. http://youtu.be/Af8vDKuaN2I 3 min.
24. http://youtu.be/xytoGUs7I9o 2 min.
25. http://youtu.be/IzvnDRHuc4U 3 min.
26. http://youtu.be/6cvJfdh5msQ 3 min.
27. None 25 min.
28. http://youtu.be/GM9PKAfTlmQ 35 min.
29. http://youtu.be/pYyv8BJ5n68 31 min.
30. https://youtu.be/abTsJTOIQkM 18 min.
31. http://youtu.be/hUduTEOywLs 26 min.
32. https://youtu.be/n3xG3EJpofc 35 min.
33. https://youtu.be/J4bYP3mTpeA 34 min.
34. http://youtu.be/DuqdMc4Kc3k 55 min.
35. https://youtu.be/nUCjrDn5Xnk 30 min.
36. https://youtu.be/CyCBZFjw-PQ 30 min.
1, FireSim: A Scalable Platform for FPGA-Accelerated Simulation, Debugging, Profiling of RTL Designs, FireSim_A_Scalable_Platform_for_FPGAAccelerated_Simulation_Debugging_and_Profiling_of_RTL_Designs.mp4, 27
2, bsg_tag: A minimal open-source ASIC configuration bus, bsg_tag_A_minimal_opensource_ASIC_configuration_bus.mp4, 19
3, OmniXtend: coherent scaleout over commodity fabrics, OmniXtend_coherent_scaleout_over_commodity_fabrics.mp4, 24
4, Hammer: A Modular and Reusable Physical Design Flow Tool, Hammer_A_Modular_and_Reusable_Physical_Design_Flow_Tool.mp4, 27
5, CIRCT: Open Source Circuit IR Compilers and Tools, CIRCT_Open_Source_Circuit_IR_Compilers_and_Tools.mp4, 33
6, Accelerating Chisel Development, Accelerating_Chisel_Development.mp4, 35
7, Open-Source HW Commercial Adoption, OpenSource_HW_Commercial_Adoption.mp4, 56
8, A UCSC Professor's path through Open-Source Hardware, A_UCSC_Professors_path_through_OpenSource_Hardware.mp4, 12
9, So You Want to be an Open Sourcerer?, So_You_Want_to_be_an_Open_Sourcerer.mp4, 19
10, If You Build It, Who Will Come?, If_You_Build_It_Who_Will_Come.mp4, 23
11, Yet Another UCSC Professor’s path through Open-Source Hardware, Yet_Another_UCSC_Professors_path_through_OpenSource_Hardware.mp4, 23
12, Tapeout-in-a-Semester: The Organization of Berkeley's Tapeout Course, TapeoutinaSemester_The_Organization_of_Berkeleys_Tapeout_Course.mp4, 27
13, Fearless Hardware Design, Fearless_Hardware_Design.mp4, 24
14, Minimax - a Compressed-First, Microcoded RISC-V CPU, Minimax_a_CompressedFirst_Microcoded_RISCV_CPU.mp4, 32
15, Open Source Brain-Inspired Neuromorphic Software and Hardware, Open_Source_BrainInspired_Neuromorphic_Software_and_Hardware.mp4, 30
16, Gdsfactory, an Open Source python flow for circuit design, verification and validation, Gdsfactory_an_Open_Source_python_flow_for_circuit_design_verification_and_validation.mp4, 3
17, RISu064 - An in-order non-blocking dual-issue RISC-V 64 processor, RISu064_An_inorder_nonblocking_dualissue_RISCV_64_processor.mp4, 2
18, SimCommand: A High-Performance RTL Testbench API with Fork/Join Support, SimCommand_A_HighPerformance_RTL_Testbench_API_with_ForkJoin_Support.mp4, 3
19, A radically simple 1-bit single-die "supercomputer", A_radically_simple_1bit_singledie_supercomputer.mp4, 3
20, All Your OSS Codebase Are Belong To Us, All_Your_OSS_Codebase_Are_Belong_To_Us.mp4, 2
21, A Modular Approach to Variable Pipeline Depth Designs, A_Modular_Approach_to_Variable_Pipeline_Depth_Designs.mp4, 3
22, Open-source Hardware for Real-Time Applications, Opensource_Hardware_for_RealTime_Applications.mp4, 3
23, An open-source robotics applications interface, An_opensource_robotics_applications_interface.mp4, 3
24, DSAGEN: Democratizing Domain-Specific Accelerator Generation for FPGA Overlays, DSAGEN_Democratizing_DomainSpecific_Accelerator_Generation_for_FPGA_Overlays.mp4, 2
25, Educational Framework for Functional Verification, Educational_Framework_for_Functional_Verification.mp4, 3
26, Using CVA6 in Architecture Education, Using_CVA6_in_Architecture_Education.mp4, 3
27, Open tools for an open standard: Control/status register automation using SystemRDL, Open_tools_for_an_open_standard_Controlstatus_register_automation_using_SystemRDL.mp4, 25
28, Goodbye Make, Hello SiliconCompiler!, Goodbye_Make_Hello_SiliconCompiler.mp4, 35
29, Chipyard: An Open-Source RISC-V SoC Design Framework, Chipyard_An_OpenSource_RISCV_SoC_Design_Framework.mp4, 31
30, SVA based Checker IP in Verilator, SVA_based_Checker_IP_in_Verilator.mp4, 18
31, Quality of Life with Virtual Prototypes - Open Source Tools in the Ecosystem of the RISC-V VP, Quality_of_Life_with_Virtual_Prototypes_Open_Source_Tools_in_the_Ecosystem_of_the_RISCV_VP.mp4, 26
32, Constellation: A Open-Source Chisel Generator for Network-on-Chip Interconnects, Constellation_A_OpenSource_Chisel_Generator_for_NetworkonChip_Interconnects.mp4, 35
33, SystemVerilog-Style Constraints and Functional Coverage in Python, SystemVerilogStyle_Constraints_and_Functional_Coverage_in_Python.mp4, 34
34, OpenROAD - Turning Designs into Optimized Silicon, OpenROAD_Turning_Designs_into_Optimized_Silicon.mp4, 55
35, Space - Opportunities, Challenges for Open Source Community, Space_Opportunities_Challenges_for_Open_Source_Community.mp4, 30
36, Online Waveform viewer. Why do we need one?, Online_Waveform_viewer_Why_do_we_need_one.mp4, 30