Fossi Foundation
Latch_2024
1. Caster: An Open-source E-Ink Controller (Wenting Zhang) https://youtu.be/AzYc2QwvoN4 17 min.
2. Teaching Modern EDA using a Tapeout-Centric University Course (Anish Singhani) https://youtu.be/ktpVnMt5dh0 21 min.
3. CedarEDA for open source silicon (Keno Fischer) https://youtu.be/AooVpEzHMnY 22 min.
4. Cohort: Software-Oriented Acceleration for You, Me, and Our Heterogeneous SoCs (Nazerke Turtayeva) https://youtu.be/lqfKEH7AD3c 12 min.
5. Towards Cycle-accurate Simulation of xBGAS (Jie Li) https://youtu.be/pyuHiv-PiXQ 18 min.
6. Towards xBGAS on CHERI: Examining the Benefits of a Secure Distributed Architecture (Mert Side) https://youtu.be/UCtkbJRlxEI 19 min.
7. Artifact Evaluation for the Field Programmable Gate Array Community (Miriam Leeser) https://youtu.be/SsVk1T772wU 18 min.
8. Chisel 6 and beyond (Jack Koenig) https://youtu.be/A5iz6mnPNW4 23 min.
9. MRPHS: Enabling Transaction-level Deductive Formal Verification Through PDVL (Tobias Strauch) https://youtu.be/3h_UTlc9GeA 19 min.
10. Architecture 2.0: Toward Open Source Foundation Models and Datasets for Hardware Design (Vijay Janapa Reddi, Shvetank Prakash) https://youtu.be/yWLcTxed95A 22 min.
11. Riding The Wave: Building Wave Pipelines in FPGAs (Rice Shelley) https://youtu.be/R2ak8KVo0F0 19 min.
12. Giving Students A Byte of Open-Source: Advancing Hardware Education (Ethan Sifferman) https://youtu.be/nXWz9Xh1klo 18 min.
13. Open-source resources for learning the Bluespec HL-HDLs (Rishiyur Nikhil) https://youtu.be/7JffUcHnaDY 2 min.
14. PyHDL-IF: An Easy-to-Use Python/HDL Cross-Calling Interface (Matt Ballance) https://youtu.be/-odFakR7h3g 16 min.
15. CitizenSilicon: towards an open-source Czochralski furnace for Si growth (Max Aalto) None 3 min.
16. Application of AI-computer vision based software (Max Faramarzi ) None 3 min.
17. Building an Ecosystem for Hardware Generators (Rachit Nigam) None 3 min.
18. Tim's Silicon Presentations (Tim Ansell) https://youtu.be/FDYfu0Mx__0 3 min.
19. Surfer - An Extensible and Snappy Waveform Viewer (Frans Skarman) https://youtu.be/QWxat_8_By0 2 min.
20. Clean up your EDA flows with tclint (Noah Moroze) https://youtu.be/4Pw6zpdp3SA 2 min.
21. Attempts to design hardware using dafny (Ben Reynwar) https://youtu.be/17q4-XLQI_Y 3 min.
22. Zeno: An Open-Source Scalable Capability-Based Secure Architecture (Alan Ehret) https://youtu.be/onGeSG4g6kw 1 min.
23. Accelerating Hardware Design with Custom GPTs (Prakash Shvetank) https://youtu.be/LZ651TctSBA 3 min.
24. OSHHISS Open Source for Hybrid Hetrogenous Integrated Semiconductor Systems (John Goodenough) https://youtu.be/XSI6MptMIMw 2 min.
25. Where Community Powers Innovation (Mohamed Kassem) https://youtu.be/T8cHGi2P-OU 3 min.
26. CoreScore like never before (Olof Kindgren) https://youtu.be/deo5kFew5tM 2 min.
27. ChipWhisperer: Past & Future of a FPGA-based Research Tool (Jean-Pierre Thibault) https://youtu.be/3VydT4X_61k 3 min.
28. clock (ck) https://youtu.be/mFeA7M8xZu0 0 min.
29. Open source RTL verification with Verilator (Karol Gugala) https://youtu.be/5lQGxMM-nIc 24 min.
30. Sonata: A development platform to enable exploring the use of CHERI for embedded applications (Hugo McNally) https://youtu.be/DoWeV0j2wmg 15 min.
31. Transparent Checkpointing for Fault Tolerance in RISC-V (Aayushi Gautam) https://youtu.be/Nq1voYgPO1k 17 min.
32. HDLAgent, Enhancing Hardware Language in the age of LLMs (Jose Renau) https://youtu.be/oLyoFuwJGZQ 23 min.
33. Spade: An HDL Inspired By Modern Software Languages (Frans Skarman) https://youtu.be/_EdOHbY2dlg 18 min.
34. Switchboard: Calling All Hardware Models (Steven Herbst) https://youtu.be/SAXi1R3M5Gc 16 min.
35. From an Open-Source ISA to Open-Source HW to Open-Source Silicon (Luca Bertaccini) https://youtu.be/eBNhohjxt9w 18 min.
36. Open Source Hardware: Hacking Silicon for Fun (instead of profit) (Troy Benjegerdes) https://youtu.be/3kIJCsGFj4A 13 min.
37. A History of TL-Verilog Google Summer of Code Projects under FOSSi Foundation (Steve Hoover) https://youtu.be/8VIaBMdcm8s 20 min.
38. UMI: Universal Memory Interface (Andreas Olofsson) https://youtu.be/9dXS6VOGfzo 25 min.
39. ABC: The Way It Should Have Been Designed (Alan Mishchenko) https://youtu.be/dIEc_nPky7U 24 min.
40. BYOL (Build Your Own Linter) – UVMLint for IEEE-UVM core code development (Ajeetha Kumari Venkatesan) None 20 min.
41. Beyond EDA lies Edalize (Olof Kindgren) https://youtu.be/yDADgbRiuws 17 min.
42. RF Front-end receiver design for 2.4GH/5GHz WiFi application (Jabeom Koo) https://youtu.be/DglGFhIfKDI 21 min.
43. CACE Study: Open source analog and mixed-signal design flow (Tim Edwards) https://youtu.be/0UMb-vd4MtU 24 min.
44. IHP Open Source PDK: Announcement, Setup, Current State and Experiences, and look ahead (Frank Vater) https://youtu.be/abAmUjBE60M 16 min.
45. Tiny Tapeout: custom silicon open to all (Pat Deegan) https://youtu.be/h4cPi42fgHs 25 min.
1. https://youtu.be/AzYc2QwvoN4 17 min.
2. https://youtu.be/ktpVnMt5dh0 21 min.
3. https://youtu.be/AooVpEzHMnY 22 min.
4. https://youtu.be/lqfKEH7AD3c 12 min.
5. https://youtu.be/pyuHiv-PiXQ 18 min.
6. https://youtu.be/UCtkbJRlxEI 19 min.
7. https://youtu.be/SsVk1T772wU 18 min.
8. https://youtu.be/A5iz6mnPNW4 23 min.
9. https://youtu.be/3h_UTlc9GeA 19 min.
10. https://youtu.be/yWLcTxed95A 22 min.
11. https://youtu.be/R2ak8KVo0F0 19 min.
12. https://youtu.be/nXWz9Xh1klo 18 min.
13. https://youtu.be/7JffUcHnaDY 2 min.
14. https://youtu.be/-odFakR7h3g 16 min.
15. None 3 min.
16. None 3 min.
17. None 3 min.
18. https://youtu.be/FDYfu0Mx__0 3 min.
19. https://youtu.be/QWxat_8_By0 2 min.
20. https://youtu.be/4Pw6zpdp3SA 2 min.
21. https://youtu.be/17q4-XLQI_Y 3 min.
22. https://youtu.be/onGeSG4g6kw 1 min.
23. https://youtu.be/LZ651TctSBA 3 min.
24. https://youtu.be/XSI6MptMIMw 2 min.
25. https://youtu.be/T8cHGi2P-OU 3 min.
26. https://youtu.be/deo5kFew5tM 2 min.
27. https://youtu.be/3VydT4X_61k 3 min.
28. https://youtu.be/mFeA7M8xZu0 0 min.
29. https://youtu.be/5lQGxMM-nIc 24 min.
30. https://youtu.be/DoWeV0j2wmg 15 min.
31. https://youtu.be/Nq1voYgPO1k 17 min.
32. https://youtu.be/oLyoFuwJGZQ 23 min.
33. https://youtu.be/_EdOHbY2dlg 18 min.
34. https://youtu.be/SAXi1R3M5Gc 16 min.
35. https://youtu.be/eBNhohjxt9w 18 min.
36. https://youtu.be/3kIJCsGFj4A 13 min.
37. https://youtu.be/8VIaBMdcm8s 20 min.
38. https://youtu.be/9dXS6VOGfzo 25 min.
39. https://youtu.be/dIEc_nPky7U 24 min.
40. None 20 min.
41. https://youtu.be/yDADgbRiuws 17 min.
42. https://youtu.be/DglGFhIfKDI 21 min.
43. https://youtu.be/0UMb-vd4MtU 24 min.
44. https://youtu.be/abAmUjBE60M 16 min.
45. https://youtu.be/h4cPi42fgHs 25 min.
1, Caster: An Open-source E-Ink Controller, Caster_An_Opensource_EInk_Controller.mp4, 17
2, Teaching Modern EDA using a Tapeout-Centric University Course, Teaching_Modern_EDA_using_a_TapeoutCentric_University_Course.mp4, 21
3, CedarEDA for open source silicon, CedarEDA_for_open_source_silicon.mp4, 22
4, Cohort: Software-Oriented Acceleration for You, Me, and Our Heterogeneous SoCs, Cohort_SoftwareOriented_Acceleration_for_You_Me_and_Our_Heterogeneous_SoCs.mp4, 12
5, Towards Cycle-accurate Simulation of xBGAS, Towards_Cycleaccurate_Simulation_of_xBGAS.mp4, 18
6, Towards xBGAS on CHERI: Examining the Benefits of a Secure Distributed Architecture, Towards_xBGAS_on_CHERI_Examining_the_Benefits_of_a_Secure_Distributed_Architecture.mp4, 19
7, Artifact Evaluation for the Field Programmable Gate Array Community, Artifact_Evaluation_for_the_Field_Programmable_Gate_Array_Community.mp4, 18
8, Chisel 6 and beyond, Chisel_6_and_beyond.mp4, 23
9, MRPHS: Enabling Transaction-level Deductive Formal Verification Through PDVL, MRPHS_Enabling_Transactionlevel_Deductive_Formal_Verification_Through_PDVL.mp4, 19
10, Architecture 2.0: Toward Open Source Foundation Models and Datasets for Hardware Design, Architecture_20_Toward_Open_Source_Foundation_Models_and_Datasets_for_Hardware_Design.mp4, 22
11, Riding The Wave: Building Wave Pipelines in FPGAs, Riding_The_Wave_Building_Wave_Pipelines_in_FPGAs.mp4, 19
12, Giving Students A Byte of Open-Source: Advancing Hardware Education, Giving_Students_A_Byte_of_OpenSource_Advancing_Hardware_Education.mp4, 18
13, Open-source resources for learning the Bluespec HL-HDLs, Opensource_resources_for_learning_the_Bluespec_HLHDLs.mp4, 2
14, PyHDL-IF: An Easy-to-Use Python/HDL Cross-Calling Interface, PyHDLIF_An_EasytoUse_PythonHDL_CrossCalling_Interface.mp4, 16
15, CitizenSilicon: towards an open-source Czochralski furnace for Si growth, CitizenSilicon_towards_an_opensource_Czochralski_furnace_for_Si_growth.mp4, 3
16, Application of AI-computer vision based software , Application_of_AIcomputer_vision_based_software.mp4, 3
17, Building an Ecosystem for Hardware Generators, Building_an_Ecosystem_for_Hardware_Generators.mp4, 3
18, Tim's Silicon Presentations, Tims_Silicon_Presentations.mp4, 3
19, Surfer - An Extensible and Snappy Waveform Viewer, Surfer_An_Extensible_and_Snappy_Waveform_Viewer.mp4, 2
20, Clean up your EDA flows with tclint, Clean_up_your_EDA_flows_with_tclint.mp4, 2
21, Attempts to design hardware using dafny, Attempts_to_design_hardware_using_dafny.mp4, 3
22, Zeno: An Open-Source Scalable Capability-Based Secure Architecture, Zeno_An_OpenSource_Scalable_CapabilityBased_Secure_Architecture.mp4, 1
23, Accelerating Hardware Design with Custom GPTs, Accelerating_Hardware_Design_with_Custom_GPTs.mp4, 3
24, OSHHISS Open Source for Hybrid Hetrogenous Integrated Semiconductor Systems, OSHHISS_Open_Source_for_Hybrid_Hetrogenous_Integrated_Semiconductor_Systems.mp4, 2
25, Where Community Powers Innovation, Where_Community_Powers_Innovation.mp4, 3
26, CoreScore like never before, CoreScore_like_never_before.mp4, 2
27, ChipWhisperer: Past & Future of a FPGA-based Research Tool, ChipWhisperer_Past_Future_of_a_FPGAbased_Research_Tool.mp4, 3
28, clock, clock.mp4, 0
29, Open source RTL verification with Verilator, Open_source_RTL_verification_with_Verilator.mp4, 24
30, Sonata: A development platform to enable exploring the use of CHERI for embedded applications, Sonata_A_development_platform_to_enable_exploring_the_use_of_CHERI_for_embedded_applications.mp4, 15
31, Transparent Checkpointing for Fault Tolerance in RISC-V, Transparent_Checkpointing_for_Fault_Tolerance_in_RISCV.mp4, 17
32, HDLAgent, Enhancing Hardware Language in the age of LLMs, HDLAgent_Enhancing_Hardware_Language_in_the_age_of_LLMs.mp4, 23
33, Spade: An HDL Inspired By Modern Software Languages, Spade_An_HDL_Inspired_By_Modern_Software_Languages.mp4, 18
34, Switchboard: Calling All Hardware Models, Switchboard_Calling_All_Hardware_Models.mp4, 16
35, From an Open-Source ISA to Open-Source HW to Open-Source Silicon, From_an_OpenSource_ISA_to_OpenSource_HW_to_OpenSource_Silicon.mp4, 18
36, Open Source Hardware: Hacking Silicon for Fun (instead of profit), Open_Source_Hardware_Hacking_Silicon_for_Fun_instead_of_profit.mp4, 13
37, A History of TL-Verilog Google Summer of Code Projects under FOSSi Foundation, A_History_of_TLVerilog_Google_Summer_of_Code_Projects_under_FOSSi_Foundation.mp4, 20
38, UMI: Universal Memory Interface, UMI_Universal_Memory_Interface.mp4, 25
39, ABC: The Way It Should Have Been Designed, ABC_The_Way_It_Should_Have_Been_Designed.mp4, 24
40, BYOL (Build Your Own Linter) – UVMLint for IEEE-UVM core code development, BYOL_Build_Your_Own_Linter_UVMLint_for_IEEEUVM_core_code_development.mp4, 20
41, Beyond EDA lies Edalize, Beyond_EDA_lies_Edalize.mp4, 17
42, RF Front-end receiver design for 2.4GH/5GHz WiFi application, RF_Frontend_receiver_design_for_24GH5GHz_WiFi_application.mp4, 21
43, CACE Study: Open source analog and mixed-signal design flow, CACE_Study_Open_source_analog_and_mixedsignal_design_flow.mp4, 24
44, IHP Open Source PDK: Announcement, Setup, Current State and Experiences, and look ahead, IHP_Open_Source_PDK_Announcement_Setup_Current_State_and_Experiences_and_look_ahead.mp4, 16
45, Tiny Tapeout: custom silicon open to all, Tiny_Tapeout_custom_silicon_open_to_all.mp4, 25