| id |
conf |
start |
state |
len
| episode.name
per New York Times Manual of Style
episode.slug
|
cmt |
released |
yt
mp4 |
| 15356 |
1 |
Fri 19 09:20 |
10 |
39 |
Caster: An Open-source E-Ink Controller
Caster: An Open-source E-Ink Controller
Caster_An_Opensource_EInk_Controller
|
|
Y |
Y
|
| 15357 |
2 |
Fri 19 09:40 |
10 |
61 |
Teaching Modern EDA using a Tapeout-Centric University Course
Teaching Modern EDA Using a Tapeout-Centric University Course
Teaching_Modern_EDA_using_a_TapeoutCentric_University_Course
|
|
Y |
Y
|
| 15358 |
3 |
Fri 19 10:20 |
10 |
32 |
CedarEDA for open source silicon
CedarEDA for Open Source Silicon
CedarEDA_for_open_source_silicon
|
|
Y |
Y
|
| 15359 |
4 |
Fri 19 10:40 |
10 |
78 |
Cohort: Software-Oriented Acceleration for You, Me, and Our Heterogeneous SoCs
Cohort: Software-Oriented Acceleration for You, Me, and Our Heterogeneous SoCs
Cohort_SoftwareOriented_Acceleration_for_You_Me_and_Our_Heterogeneous_SoCs
|
|
Y |
Y
|
| 15361 |
6 |
Fri 19 10:53 |
10 |
42 |
Towards Cycle-accurate Simulation of xBGAS
Towards Cycle-accurate Simulation of xBGAS
Towards_Cycleaccurate_Simulation_of_xBGAS
|
|
Y |
Y
|
| 15360 |
5 |
Fri 19 11:00 |
10 |
83 |
Towards xBGAS on CHERI: Examining the Benefits of a Secure Distributed Architecture
Towards xBGAS on CHERI: Examining the Benefits of a Secure Distributed Architecture
Towards_xBGAS_on_CHERI_Examining_the_Benefits_of_a_Secure_Distributed_Architecture
|
|
Y |
Y
|
| 15362 |
7 |
Fri 19 12:40 |
10 |
67 |
Artifact Evaluation for the Field Programmable Gate Array Community
Artifact Evaluation for the Field Programmable Gate Array Community
Artifact_Evaluation_for_the_Field_Programmable_Gate_Array_Community
|
|
Y |
Y
|
| 15363 |
8 |
Fri 19 13:00 |
10 |
19 |
Chisel 6 and beyond
Chisel 6 and Beyond
Chisel_6_and_beyond
|
|
Y |
Y
|
| 15364 |
9 |
Fri 19 13:20 |
10 |
76 |
MRPHS: Enabling Transaction-level Deductive Formal Verification Through PDVL
MRPHS: Enabling Transaction-level Deductive Formal Verification Through PDVL
MRPHS_Enabling_Transactionlevel_Deductive_Formal_Verification_Through_PDVL
|
|
Y |
Y
|
| 15365 |
10 |
Fri 19 14:20 |
10 |
87 |
Architecture 2.0: Toward Open Source Foundation Models and Datasets for Hardware Design
Architecture 2.0: Toward Open Source Foundation Models and Datasets for Hardware Design
Architecture_20_Toward_Open_Source_Foundation_Models_and_Datasets_for_Hardware_Design
|
|
Y |
Y
|
| 15366 |
11 |
Fri 19 14:40 |
10 |
49 |
Riding The Wave: Building Wave Pipelines in FPGAs
Riding the Wave: Building Wave Pipelines in FPGAs
Riding_The_Wave_Building_Wave_Pipelines_in_FPGAs
|
|
Y |
Y
|
| 15367 |
12 |
Fri 19 15:00 |
10 |
67 |
Giving Students A Byte of Open-Source: Advancing Hardware Education
Giving Students a Byte of Open-Source: Advancing Hardware Education
Giving_Students_A_Byte_of_OpenSource_Advancing_Hardware_Education
|
|
Y |
Y
|
| 15368 |
13 |
Fri 19 15:40 |
10 |
55 |
Open-source resources for learning the Bluespec HL-HDLs
Open-source Resources for Learning the Bluespec HL-HDLs
Opensource_resources_for_learning_the_Bluespec_HLHDLs
|
|
Y |
Y
|
| 15369 |
14 |
Fri 19 16:00 |
10 |
59 |
PyHDL-IF: An Easy-to-Use Python/HDL Cross-Calling Interface
PyHDL-IF: An Easy-to-Use Python/HDL Cross-Calling Interface
PyHDLIF_An_EasytoUse_PythonHDL_CrossCalling_Interface
|
|
Y |
Y
|
| 15393 |
38 |
Fri 19 18:00 |
0 |
72 |
CitizenSilicon: towards an open-source Czochralski furnace for Si growth
CitizenSilicon: Towards an Open-source Czochralski Furnace for Si Growth
CitizenSilicon_towards_an_opensource_Czochralski_furnace_for_Si_growth
|
8 |
Y |
|
| 15387 |
32 |
Fri 19 18:00 |
0 |
56 |
Application of AI-computer vision based software
Application of AI-computer Vision Based Software
Application_of_AIcomputer_vision_based_software
|
8 |
Y |
|
| 15392 |
37 |
Fri 19 18:00 |
0 |
45 |
Building an Ecosystem for Hardware Generators
Building an Ecosystem for Hardware Generators
Building_an_Ecosystem_for_Hardware_Generators
|
8 |
Y |
|
| 15394 |
100 |
Fri 19 18:14 |
10 |
27 |
Tim's Silicon Presentations
Tim's Silicon Presentations
Tims_Silicon_Presentations
|
|
Y |
Y
|
| 15395 |
101 |
Fri 19 18:18 |
10 |
49 |
Surfer - An Extensible and Snappy Waveform Viewer
Surfer - an Extensible and Snappy Waveform Viewer
Surfer_An_Extensible_and_Snappy_Waveform_Viewer
|
|
Y |
Y
|
| 15391 |
36 |
Fri 19 18:21 |
10 |
35 |
Clean up your EDA flows with tclint
Clean Up Your EDA Flows With Tclint
Clean_up_your_EDA_flows_with_tclint
|
28 |
Y |
Y
|
| 15388 |
33 |
Fri 19 18:24 |
10 |
39 |
Attempts to design hardware using dafny
Attempts to Design Hardware Using Dafny
Attempts_to_design_hardware_using_dafny
|
|
Y |
Y
|
| 15396 |
102 |
Fri 19 18:27 |
10 |
66 |
Zeno: An Open-Source Scalable Capability-Based Secure Architecture
Zeno: An Open-Source Scalable Capability-Based Secure Architecture
Zeno_An_OpenSource_Scalable_CapabilityBased_Secure_Architecture
|
|
Y |
Y
|
| 15389 |
34 |
Fri 19 18:29 |
10 |
45 |
Accelerating Hardware Design with Custom GPTs
Accelerating Hardware Design With Custom GPTs
Accelerating_Hardware_Design_with_Custom_GPTs
|
|
Y |
Y
|
| 15390 |
35 |
Fri 19 18:32 |
10 |
75 |
OSHHISS Open Source for Hybrid Hetrogenous Integrated Semiconductor Systems
OSHHISS Open Source for Hybrid Hetrogenous Integrated Semiconductor Systems
OSHHISS_Open_Source_for_Hybrid_Hetrogenous_Integrated_Semiconductor_Systems
|
|
Y |
Y
|
| 15397 |
103 |
Fri 19 18:35 |
10 |
33 |
Where Community Powers Innovation
Where Community Powers Innovation
Where_Community_Powers_Innovation
|
|
Y |
Y
|
| 15398 |
104 |
Fri 19 18:40 |
10 |
27 |
CoreScore like never before
CoreScore Like Never Before
CoreScore_like_never_before
|
|
Y |
Y
|
| 15399 |
105 |
Fri 19 18:43 |
10 |
58 |
ChipWhisperer: Past & Future of a FPGA-based Research Tool
ChipWhisperer: Past & Future of a FPGA-based Research Tool
ChipWhisperer_Past_Future_of_a_FPGAbased_Research_Tool
|
|
Y |
Y
|
| 15400 |
|
Fri 19 19:07 |
0 |
5 |
clock
Clock
clock
|
|
N |
Y
|
| 15370 |
15 |
Sat 20 09:00 |
10 |
43 |
Open source RTL verification with Verilator
Open Source RTL Verification With Verilator
Open_source_RTL_verification_with_Verilator
|
|
Y |
Y
|
| 15371 |
16 |
Sat 20 09:20 |
10 |
93 |
Sonata: A development platform to enable exploring the use of CHERI for embedded applications
Sonata: A Development Platform to Enable Exploring the Use of CHERI for Embedded Applications
Sonata_A_development_platform_to_enable_exploring_the_use_of_CHERI_for_embedded_applications
|
|
Y |
Y
|
| 15372 |
17 |
Sat 20 09:40 |
10 |
55 |
Transparent Checkpointing for Fault Tolerance in RISC-V
Transparent Checkpointing for Fault Tolerance in RISC-V
Transparent_Checkpointing_for_Fault_Tolerance_in_RISCV
|
|
Y |
Y
|
| 15373 |
18 |
Sat 20 10:20 |
10 |
56 |
HDLAgent, Enhancing Hardware Language in the age of LLMs
HDLAgent, Enhancing Hardware Language in the Age of LLMs
HDLAgent_Enhancing_Hardware_Language_in_the_age_of_LLMs
|
|
Y |
Y
|
| 15374 |
19 |
Sat 20 10:40 |
10 |
51 |
Spade: An HDL Inspired By Modern Software Languages
Spade: An HDL Inspired by Modern Software Languages
Spade_An_HDL_Inspired_By_Modern_Software_Languages
|
|
Y |
Y
|
| 15375 |
20 |
Sat 20 11:00 |
10 |
40 |
Switchboard: Calling All Hardware Models
Switchboard: Calling All Hardware Models
Switchboard_Calling_All_Hardware_Models
|
|
Y |
Y
|
| 15376 |
21 |
Sat 20 12:20 |
10 |
64 |
From an Open-Source ISA to Open-Source HW to Open-Source Silicon
From an Open-Source ISA to Open-Source HW to Open-Source Silicon
From_an_OpenSource_ISA_to_OpenSource_HW_to_OpenSource_Silicon
|
|
Y |
Y
|
| 15377 |
22 |
Sat 20 12:40 |
10 |
65 |
Open Source Hardware: Hacking Silicon for Fun (instead of profit)
Open Source Hardware: Hacking Silicon for Fun (Instead of Profit)
Open_Source_Hardware_Hacking_Silicon_for_Fun_instead_of_profit
|
|
Y |
Y
|
| 15378 |
23 |
Sat 20 13:00 |
10 |
77 |
A History of TL-Verilog Google Summer of Code Projects under FOSSi Foundation
A History of TL-Verilog Google Summer of Code Projects Under FOSSi Foundation
A_History_of_TLVerilog_Google_Summer_of_Code_Projects_under_FOSSi_Foundation
|
|
Y |
Y
|
| 15379 |
24 |
Sat 20 13:20 |
10 |
31 |
UMI: Universal Memory Interface
UMI: Universal Memory Interface
UMI_Universal_Memory_Interface
|
|
Y |
Y
|
| 15380 |
25 |
Sat 20 14:20 |
10 |
41 |
ABC: The Way It Should Have Been Designed
ABC: The Way It Should Have Been Designed
ABC_The_Way_It_Should_Have_Been_Designed
|
|
Y |
Y
|
| 15381 |
26 |
Sat 20 14:40 |
0 |
73 |
BYOL (Build Your Own Linter) – UVMLint for IEEE-UVM core code development
BYOL (Build Your Own Linter) – UVMLint for IEEE-UVM Core Code Development
BYOL_Build_Your_Own_Linter_UVMLint_for_IEEEUVM_core_code_development
|
|
Y |
|
| 15382 |
27 |
Sat 20 15:00 |
10 |
23 |
Beyond EDA lies Edalize
Beyond EDA Lies Edalize
Beyond_EDA_lies_Edalize
|
|
Y |
Y
|
| 15383 |
28 |
Sat 20 15:40 |
10 |
60 |
RF Front-end receiver design for 2.4GH/5GHz WiFi application
RF Front-end Receiver Design for 2.4GH/5GHz WiFi Application
RF_Frontend_receiver_design_for_24GH5GHz_WiFi_application
|
|
Y |
Y
|
| 15384 |
29 |
Sat 20 16:00 |
10 |
59 |
CACE Study: Open source analog and mixed-signal design flow
CACE Study: Open Source Analog and Mixed-signal Design Flow
CACE_Study_Open_source_analog_and_mixedsignal_design_flow
|
|
Y |
Y
|
| 15385 |
30 |
Sat 20 16:20 |
10 |
87 |
IHP Open Source PDK: Announcement, Setup, Current State and Experiences, and look ahead
IHP Open Source PDK: Announcement, Setup, Current State and Experiences, and Look Ahead
IHP_Open_Source_PDK_Announcement_Setup_Current_State_and_Experiences_and_look_ahead
|
|
Y |
Y
|
| 15386 |
31 |
Sat 20 16:40 |
10 |
40 |
Tiny Tapeout: custom silicon open to all
Tiny Tapeout: Custom Silicon Open to All
Tiny_Tapeout_custom_silicon_open_to_all
|
|
Y |
Y
|