status grid processes pipeline | recording_sheets.pdf today's t+1 Reschedule | schedule talk_intro.pdf | title slides | anomalies | |
client admin | show admin | episodes admin | image_file admin | play_list |
id | loc name | start | end | duration | state | episode.name | episode.authors | e/r | cmt | rel | img | rf | host | index |
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14815 | Revolution Hall | Sun 05 09:30 | 10:00 | 0:30:0 | 8 | BaseJump STL: a Standard Template Library for Hardware Design | Daniel Petrisko | y | Y | 7 | Y | |||
14817 | Revolution Hall | Sun 05 10:30 | 11:00 | 0:30:0 | 8 | Verifying Open-Source Silicon with SystemVerilog: Getting in on the Ground Floor | Matthew Ballance | y | Y | 8 | Y |
Veyepar Video Eyeball Processor and Review