Hi user
Admin Login:
status grid processes pipeline recording_sheets.pdf today's t+1 Reschedule schedule talk_intro.pdf title slides anomalies
client admin show admin episodes admin image_file admin play_list

Episode Count: 13
id loc name startend duration state episode.name episode.authors e/r cmt rel img rf host index
14815 Revolution Hall Sun 05 09:30 10:00 0:30:0 8 BaseJump STL: a Standard Template Library for Hardware Design Daniel Petrisko y Y 7 Y
14816 Revolution Hall Sun 05 10:00 10:30 0:30:0 12 OSVVM, VHDL's #1 FPGA Verification Library Jim Lewis y Y 10 Y
14817 Revolution Hall Sun 05 10:30 11:00 0:30:0 8 Verifying Open-Source Silicon with SystemVerilog: Getting in on the Ground Floor Matthew Ballance y Y 8 Y
14818 Revolution Hall Sun 05 11:20 11:40 0:20:0 12 RISC-V in Debian Vagrant Cascadian y Y 10 Y
14819 Revolution Hall Sun 05 11:40 12:10 0:30:0 0 Lightning Talks N 10
14826 Revolution Hall Sun 05 11:49 12:01 00:12:00 12 Hermes-Lite: Amateur Radio SDR Steve Haynal y Y 10 Y
14827 Revolution Hall Sun 05 12:01 12:29 00:28:00 12 Tim has too many projects - LatchUp Edition Tim 'mithro' Ansell y Y 11 Y
14820 Revolution Hall Sun 05 13:20 13:50 0:30:0 12 FuseSoC - Cores have never been so much fun Olof Kindgren y Y 4 Y
14821 Revolution Hall Sun 05 13:50 14:20 0:30:0 12 DUH: document and tools for HW design reuse Aliaksei Chapyzhenka y Y 10 Y
14822 Revolution Hall Sun 05 14:20 14:50 0:30:0 12 Nyuzi: An Open Source GPGPU Processor Jeff Bush y Y 9 Y
14823 Revolution Hall Sun 05 15:10 15:40 0:30:0 12 OpenRAM: An Open Source Memory Compiler Matthew Guthaus y Y 12 Y
14824 Revolution Hall Sun 05 15:40 16:10 0:30:0 0 SYZYGY: An Open Standard For Semiconductor Evaluation Tom McLeod y Y 14
14825 Revolution Hall Sun 05 16:00 16:20 0:20:0 12 Open-Source FPGA tools, how and why? Piotr Esden-Tempski y Y 6 Y

Veyepar Video Eyeball Processor and Review